This is easy with timer prescalers and clock dividers; the original 32.768 kHz signal is divided by 8 to produce a clock that ticks every 4.096 kHz. Divide that again by 120, and you get 34 2/15.

The AVR128DA28 that’s used here tops out at 24 MHz (double that if you use the PLL) but [David] got reliable results from his clock divider feeding a signal as high as 90 MHz to the input pin.